Hi, my name is

Apostolos Kokolis.

I am a third year PhD student in the Computer Science department at the University of Illinois at Urbana-Champaign, where I work with professor Josep Torrellas in the iacoma group.

My research interests lie in the area of computer architecture. More precisely, I am interested in designing high performance, power efficient and variability robust systems. Currently, I am exploring hybrid memory architectures and non-volatile memories.

The Fall of 2018, I joined AMD Research as an intern. During that time I focused on micro-architecture techniques to tolerate the increased memory latency of non-volatile caches in modern CPU chiplets. Before starting my Phd, I spent six months at IMEC research institute , where I worked on enhancing a simulation framework for evaluating the impact of device variability on future CMOS technology nodes.

I received the degree of Electrical and Computer Engineering from the National Technical University of Athens. My diploma thesis was about the mitigation of performance variability induced by reliability methods and was supervised by professor Dimitrios Soudris.

You can find my resume in the following link: Resume


  • [Computer Architecture] Design, Implementation and Testing of hardware algorithms managing pages in Two-Level Memory systems combining both DRAM and NVM memories. Performing full-system simulations to assess the performance of future memory systems that exploit the extra capacity and the non-volatility of NVM memories without harnessing performance, by dynamically moving pages between the two memories.
  • [Computer Architecture and Systems] Implemented a runtime system orchestrating the Checkpoint-Restart procedure of applications and tested it on real hardware. The system is able to adjust to the platform's failure rate and adjust the checkpoint interval of the applications and the frequency of the processor in a controlled manner to minimize the performance overheads of reliability techniques.
  • [Computer Architecture,Parallel Systems and Circuits] Development of a parallel simulation framework that evaluates data-dependent transistor variation, without suffering from prohibited simulation latency.
  • [Software Engineering] Implemented an application that performs auctions in a distributed environment, while it is able to guarantee the concurency and consistency of the auctions between different users.
  • [Compilers] Implemented a compiler for the COOL programming language as part of the Compiler Construction course at UIUC.
  • Publications

  • [HPCA] PageSeer: Using Page Walks to Trigger Page Swaps in Hybrid Memory Systems., Apostolos Kokolis, Dimitrios Skarlatos, and Josep Torrellas. Proceedings of the 25th Intl. Symposium on High-Performance Computer Architecture (HPCA), Washington D.C., USA, February 2019.
  • [DATE] Runtime interval optimization and dependable performance for application-level checkpointing., Apostolos Kokolis, Alexandros Mavrogiannis, Dimitrios Rodopoulos, Christos Strydis, Dimitrios Soudris. Proceedings of the Design, Automation and Test in Europe (DATE) Conference 2016: 594-599
  • Contact me



    Office Address

    Thomas M. Siebel Center for Computer Science, 201 N. Goodwin,
    Urbana, IL 61801-2302.
    Room # 4238